Escuela Superior de Ingenieros

 Universidad de Sevilla


 Laboratorio de Microelectrónica Digital
  Digital Microelectronics Lab

Staff:
Dr. Miguel Angel Aguirre Echánove
Dr. Jonathan Noel Tombs
Dr. Fernando Muñoz Chavero

 Course "Digital Microelectronics Lab" is an optional course in the 4th level in Telecommunication Engineering title and in 2nd level in Electronic Engineering title. In this page all the information related to the projects is exposed.

The course consists of a development and implementation of a complete microelectronic project made by teams of THREE students.
The complete project have to be described in a HDL and have to be finished with a ready-to-run prototype, using a FPGA board. All the information about the course is given (in spanish) at the begining of the course Telecommunication Engineering and Electrónic Engineering.

The course site is at the assigned room in the compunting centre of our school.

METHODOLOGY

The course pursues to give the student, added to the normal exercise of the contents of the microelectronics course, an experience on self-organising of the work inside the team, experience on oral presentations and take decisions in "open" problems.

During the course-time two documents must be done, draft project and project, and two oral presentations. A guide (in spanish) about how to do it is proposed. At the end of the course the temas has to provide:


USEFUL INFORMATION USED IN THIS COURSE

Manuals for the FPGA's:

Those links show the information about the boards: The user manual and technical information for the temperature sensor DS1820, used for the Electronic Engineering project can be found following this link:


STUDENT PROJECTS DEVELOPED IN PREVIOUS YEARS
 


TRAINING LAB PROJECTS FOR BEGINING THE COURSE (in spanish)

DOWNLOADING AREA

Here, the popular layout editor program from Etienne Sicard can be downloaded. Other PC programs can be also downloaded.

Microwind, version Aug 27th, 2002

Some shareware utilities for practising with VHDL

VHDL Simulator for PC
Example of simulation made in VHDL

A design for bidirectional dialog between Parallel Centronics port and XS40 Board

Link PC - XS40



 Important Dates

1st oral presentation for Telecommunication Engineering: Th, March 1 of 2001
1st oral presentation for Electronic Engineering: We, March 14 of 2001

 

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  SEE VIRTEX PROJECTS DEVELOPED IN OUR DEPARTMENT (UNSHADES project)

UNSHADES-1 board

Acknowledgements (agradecimientos):

and the Xilinx University Program (XUP).
Gently donated the software Foundation 3.3i licenses and the development  board XS40.

Technical support and development of the XS40 board.
 
 
 

Following these links you'll find our personal web sites: Miguel A. AguirreJonathan N. Tombs